A 12-mW ADC Delta–Sigma Modulator With 80 dB of Dynamic Range Integrated in a Single-Chip Bluetooth Transceiver
نویسندگان
چکیده
This paper presents a switched-capacitor multibit ADC delta–sigma modulator for baseband demodulation integrated in a single-chip Bluetooth radio-modem transceiver that achieves 77 dB of signal-to-noise-plus-distortion ratio (SINAD) and 80 dB of dynamic range over a 500-kHz bandwidth with a 32-MHz sample rate. The 1-mm circuit is implemented in a 0.35m BiCMOS SOI process and consumes 4.4 mA of current from a 2.7-V supply.
منابع مشابه
Time-Mode Signal Quantization for Use in Sigma-Delta Modulators
The rapid scaling in modern CMOS technology has motivated the researchers to design new analog-to-digital converter (ADC) architectures that can properly work in lower supply voltage. An exchanging the data quantization procedure from the amplitude to the time domain, can be a promising alternative well adapt with the technology scaling. This paper is going to review the recent development in t...
متن کاملA 1.8 V 89.2 dB dynamic range delta-sigma modulator using an op-amp dynamic current biasing technique
A third-order single-bit delta-sigma modulator is presented in this paper. An op-amp dynamic current biasing technique is used to improve the power-efficiency of the modulator. The voltage reference block is integrated with the delta-sigma modulator core to avoid the use of large off-chip bypass capacitors and to minimize pin numbers. It achieves 89.2 dB dynamic range over 10 kHz signal bandwid...
متن کاملA Sigma-Delta ADC with Decimation and Gain Control Function for a Bluetooth Receiver in 130 nm Digital CMOS
We present a discrete-time second-order multibit sigma-delta ADC that filters and decimates by two the input data samples. At the same time it provides gain control function in its input sampling stage. A 4-tap FIR switched capacitor (SC) architecture was chosen for antialiasing filtering. The decimation-by-two function is realized using divided-by-two clock signals in the antialiasing filter. ...
متن کاملA selectable - bandwidth 3 . 5 mW , 0 . 03 mm 2 self - oscillating Sigma Delta modulator with 71 dB dynamic range at 5 MHz and 65 dB at 10 MHz
In this paper we present a dual-mode thirdorder continuous time Σ∆ modulator that combines noise-shaping and pulse-width-modulation (PWM). In our 0.18 μm CMOS prototype chip the clock frequency equals 1GHz, but the PWM carrier is only around 125 MHz. By adjusting the loop filter, the ADC bandwidth can be set to 5 or 10 MHz. In the 5 MHz mode the peak SNDR equals 64dB and the dynamic range 71dB....
متن کاملA Single-Chip Stereo Audio Delta-Sigma A/D Converter with 117 dB Dynamic Range
A 24-bit, 96 kHz stereo A/D converter (ADC) for DVD-audio has been developed. The single-chip integrates stereo delta-sigma modulators (∆ΣM’s), a voltage reference, and a decimation filter. A fourth-order cascaded ∆ΣM using a local feedback technique was employed to avoid overload without sacrificing noise performance. Low power switched-capacitor techniques were used for implementation. A two-...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 2001